UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 260

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

258
Address: F0190H, F0191H (TMR00) to F019EH, F019FH (TMR07)
TMRmn
Symbol
Note
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
F01C8H, F01C9H (TMR10) to F01CEH, F01CFH (TMR13)
The operation of MDmn0 bits varies depending on each operation mode (see table below).
• Interval timer mode
• Capture mode
• Event counter mode
• One-count mode
• Capture & one-count mode
mn3
CKS
MD
If the start trigger (TSmn = 1) is issued during operation, the counter is cleared, an interrupt is
generated, and recounting is started.
mn
15
0
0
0
1
1
(0, 1, 0)
(0, 1, 1)
(1, 0, 0)
(1, 1, 0)
(0, 0, 0)
(Value set by the MDmn3 to MDmn1 bits
mn = 00 to 07, 10 to 13
Other than above
mn2
MD
14
0
1
1
0
1
0
Figure 7-7. Format of Timer Mode Register mn (TMRmn) (3/3)
(see table above))
Operation mode
mn1
MD
13
0
0
1
0
0
0
Other than above
CCS
mn0
MD
1/0
1/0
1/0
mn
12
0
0
MAST
ERmn
Interval timer mode
Capture mode
Event counter mode
One-count mode
Capture & one-count mode
Setting prohibited
11
CHAPTER 7 TIMER ARRAY UNIT
Operation mode of channel n
User’s Manual U18432EJ5V0UD
STS
mn2
10
STS
mn1
9
mn0
MD
0
1
0
0
1
0
STS
mn0
8
Timer interrupt is not generated when counting is started
(timer output does not change, either).
Timer interrupt is generated when counting is started
(timer output also changes).
Timer interrupt is not generated when counting is started
(timer output does not change, either).
Start trigger is invalid during counting operation.
At that time, interrupt is not generated, either.
Start trigger is valid during counting operation
At that time, interrupt is also generated.
Timer interrupt is not generated when counting is started
(timer output does not change, either).
Start trigger is invalid during counting operation.
At that time interrupt is not generated, either.
Setting prohibited
After reset: 0000H
mn1
CIS
7
Setting of starting counting and interrupt
Counting down
Counting up
Counting down
Counting down
Counting up
mn0
CIS
Count operation of TCR
6
5
0
R/W
4
0
mn3
MD
3
Possible
Possible
Possible
Impossible
Possible
mn2
Independent operation
MD
2
Note
mn1
.
MD
1
mn0
MD
0