UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 552

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.
550
Remark X: Don’t care
2. When channel 3 of unit 0 is set to UART1 reception, this pin becomes an RxD1 function pin. In this case,
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 13.3 (12) Serial output
5. When using UART1 transmission and reception in a pair, set channel 2 of unit 0 to UART1 transmission
6. The SMR02 register of channel 2 of unit 0 must also be set during UART1 reception. For details, refer to
7. Set the CKO03 bit to 1 before a start condition is generated. Clear the SO03 bit from 1 to 0 when the start
8. Set the CKO03 bit to 1 before a stop condition is generated. Clear the SO03 bit from 0 to 1 when the stop
set channel 2 of unit 0 to operation stop mode or UART1 transmission (refer to Table 13-7).
When channel 2 of unit 0 is set to CSI10 or IIC10, this pin cannot be used as an RxD1 function pin. In this
case, set channel 3 of unit 0 to operation stop mode or CSI11 or IIC11.
register m (SOm).
(refer to Table 13-7).
13.6.2 (1) Register setting.
condition is generated.
condition is generated.
CHAPTER 13 SERIAL ARRAY UNIT
User’s Manual U18432EJ5V0UD

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