UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 272
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UPD78F1174AGF-GAT-AX
Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1174AGF-GAT-AX.pdf
(968 pages)
Specifications of UPD78F1174AGF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Address: F01BCH, F01BDH
Address: F01E4H, F01E5H
(11) Timer output level register m (TOLm)
Symbol
Symbol
TOL0
TOL1
TOLm is a register that controls the timer output level of each channel.
The setting of the inverted output of channel n by this register is reflected at the timing of set or reset of the
timer output signal while the timer output is enabled (TOEmn = 1) in the combination-operation mode (TOMmn
= 1). In the toggle mode (TOMmn = 0), this register setting is invalid.
TOLm can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of TOLm can be set with an 8-bit memory manipulation instruction with TOLmL.
Reset signal generation clears this register to 0000H.
Caution Be sure to clear bits 15 to 8 of TOL0 and bits 15 to 4 of TOL1 to “0”.
Remarks 1. If the value of this register is rewritten during timer operation, the timer output is inverted when
TOL
mn
15
15
0
1
0
0
2. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
Positive logic output (active-high)
Inverted output (active-low)
14
14
the timer output signal changes next, instead of immediately after the register value is rewritten.
mn = 00 to 07, 10 to 13
0
0
Figure 7-20. Format of Timer Output Level Register m (TOLm)
After reset: 0000H
13
13
After reset: 0000H
0
0
12
12
0
0
11
11
0
0
CHAPTER 7 TIMER ARRAY UNIT
User’s Manual U18432EJ5V0UD
R/W
R/W
10
10
0
0
Control of timer output level of channel n
9
0
9
0
8
0
8
0
TOL
07
7
7
0
TOL
06
6
6
0
TOL
05
5
5
0
TOL
04
4
4
0
TOL
TOL
03
13
3
3
TOL
TOL
02
12
2
2
TOL
TOL
01
11
1
1
TOL
TOL
00
10
0
0
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