UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 68

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• Processor mode control register (PMC)
3.1.3 Internal data memory space
Four general-purpose register banks consisting of eight 8-bit registers per bank are assigned to the 32-byte area of
FFEE0H to FFEFFH of the internal RAM area. However, instructions cannot be executed by using general-purpose
registers.
66
This register selects the flash memory space for mirroring to area from F0000H to FFFFFH.
PMC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Cautions 1. Set PMC only once during the initial settings prior to operating the DMA controller. Rewriting
78K0R/KH3 products incorporate the following RAMs.
The internal RAM can be used as a data area and a program area where instructions are written and executed.
The internal RAM is used as a stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
Address: FFFFEH After reset: 00H R/W
Symbol
PMC
2. After setting PMC, wait for at least one instruction and access the mirror area.
2. While using the self-programming function, the area of FFE20H to FFEFFH cannot be used as
Figure 3-6. Format of Configuration of Processor Mode Control Register (PMC)
PMC other than during the initial settings is prohibited.
instructions or as a stack area.
a stack memory. Furthermore, the areas of F8700H to F8EFFH cannot be used with the
μ
PD78F1178 and 78F1178A, respectively.
μ
μ
μ
μ
μ
PD78F1174, 78F1174A
PD78F1175, 78F1175A
PD78F1176, 78F1176A
PD78F1177, 78F1177A
PD78F1178, 78F1178A
MAA
7
0
0
1
Part Number
00000H to 0FFFFH is mirrored to F0000H to FFFFFH
10000H to 1FFFFH is mirrored to F0000H to FFFFFH
Selection of flash memory space for mirroring to area from F0000H to FFFFFH
6
0
Table 3-4. Internal RAM Capacity
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U18432EJ5V0UD
5
0
8192 × 8 bits (FDF00H to FFEFFH)
10240 × 8 bits (FD700H to FFEFFH)
12288 × 8 bits (FCF00H to FFEFFH)
24576 × 8 bits (F9F00H to FFEFFH)
30720 × 8 bits (F8700H to FFEFFH)
4
0
Internal RAM
3
0
2
0
1
0
MAA
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