UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 216

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(6) Peripheral enable registers 0, 1 (PER0, PER1)
214
These registers are used to enable or disable use of each peripheral hardware macro. Clock supply to the
hardware that is not used is also stopped so as to decrease the power consumption and noise.
PER0 and PER1 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears theses registers to 00H.
Address: F00F0H
Address: F00F1H
Symbol
Symbol
PER0
PER1
Note The input clock that can be controlled by RTCEN is used when the register that is used by the
Caution Be sure to clear bits 1 to 7 of PER1 to 0.
DACEN
ADCEN
RTCEN
RTCEN
IIC0EN
<7>
7
0
0
1
0
1
0
1
0
1
real-time counter (RTC) is accessed from the CPU. RTCEN cannot control supply of the
operating clock (f
After reset: 00H
After reset: 00H
Stops input clock supply.
• SFR used by the real-time counter (RTC) cannot be written.
• Operation of the real-time counter (RTC) is in the reset status.
Supplies input clock.
• SFR used by the real-time counter (RTC) can be read and written.
Stops input clock supply.
• SFR used by D/A converter cannot be written.
• The D/A converter is in the reset status.
Supplies input clock.
• SFR used by the D/A converter can be read and written.
Stops input clock supply.
• SFR used by the A/D converter cannot be written.
• The A/D converter is in the reset status.
Supplies input clock.
• SFR used by the A/D converter can be read and written.
Stops input clock supply.
• SFR used by the serial interface IIC0 cannot be written.
• The serial interface IIC0 is in the reset status.
Supplies input clock.
• SFR used by the serial interface IIC0 can be read and written.
Figure 6-7. Format of Peripheral Enable Register (1/2)
DACEN
<6>
6
0
SUB
CHAPTER 6 CLOCK GENERATOR
R/W
R/W
ADCEN
) to RTC.
<5>
User’s Manual U18432EJ5V0UD
5
0
Control of real-time counter (RTC) input clock
Control of serial interface IIC0 input clock
Control of D/A converter input clock
Control of A/D converter input clock
IIC0EN
<4>
4
0
SAU1EN
<3>
3
0
SAU0EN
<2>
2
0
Note
TAU1EN
<1>
1
0
TAU0EN
EXBEN
<0>
<0>