UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 259

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address: F0190H, F0191H (TMR00) to F019EH, F019FH (TMR07)
TMRmn
Symbol
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
F01C8H, F01C9H (TMR10) to F01CEH, F01CFH (TMR13)
If both the edges are specified when the value of the STSmn2 to STSmn0 bits is other than 010B, set the CISmn1
to CISmn0 bits to 10B.
STS
mn2
mn1
CKS
CIS
mn
Other than above
15
0
0
0
1
0
0
1
1
mn = 00 to 07, 10 to 13
STS
mn1
mn0
CIS
14
0
1
0
1
0
0
1
0
0
Figure 7-7. Format of Timer Mode Register mn (TMRmn) (2/3)
Falling edge
Rising edge
Both edges (when low-level width is measured)
Start trigger: Falling edge, Capture trigger: Rising edge
Both edges (when high-level width is measured)
Start trigger: Rising edge, Capture trigger: Falling edge
STS
mn0
13
0
1
0
0
0
Only software trigger start is valid (other trigger sources are unselected).
Valid edge of TImn pin input is used as both the start trigger and capture trigger.
Both the edges of TImn pin input are used as a start trigger and a capture trigger.
Interrupt signal of the master channel is used (when the channel is used as a slave channel
with the combination-operation function).
Setting prohibited
CCS
mn
12
MAST
ERmn
11
CHAPTER 7 TIMER ARRAY UNIT
User’s Manual U18432EJ5V0UD
STS
mn2
10
Setting of start trigger or capture trigger of channel n
STS
mn1
9
Selection of TImn pin input valid edge
STS
mn0
8
After reset: 0000H
mn1
CIS
7
mn0
CIS
6
5
0
R/W
4
0
mn3
MD
3
mn2
MD
2
mn1
MD
1
mn0
MD
257
0