UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 41

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2) Control mode
2.2.5 P40 to P47 (port 4)
interface data I/O, clock I/O, data I/O for a flash memory programmer/debugger, clock output, and timer I/O.
using port input mode register 4 (PIM4).
tolerance) in 1-bit units using port output mode register 4 (POM4).
(1) Port mode
(2) Control mode
P40 to P47 function as an 8-bit I/O port. These pins also function as external interrupt request input, serial
Input to the P43 and P44 pins can be specified through a normal input buffer or a TTL input buffer in 1-bit units
Output from the P43 and P45 pins can be specified as normal CMOS output or N-ch open-drain output (V
The following operation modes can be specified in 1-bit units.
P30 and P31 function as external interrupt request input, timer I/O, and real-time counter correction clock output.
(a) INTP3, INTP4
(b) TI03
(c) TO03
(d) RTC1HZ
P40 to P47 function as an 8-bit I/O port. P40 to P47 can be set to input or output port in 1-bit units using port
mode register 4 (PM4). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 4
(PU4).
Be sure to connect an external pull-up resistor to P40 when on-chip debugging is enabled (by using an option
byte).
P40 to P47 function as serial interface data I/O, clock I/O, external interrupt request input, data I/O for a flash
memory programmer/debugger, clock output, and timer I/O.
(a) INTP1, INTP2
(b) TOOL0
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
This is a pin for inputting an external count clock/capture trigger to 16-bit timer 03.
This is a timer output pin from 16-bit timer 03.
This is a real-time counter correction clock (1 Hz) output pin.
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
This is a data I/O pin for a flash memory programmer/debugger.
Be sure to pull up this pin externally when on-chip debugging is enabled (pulling it down is prohibited).
CHAPTER 2 PIN FUNCTIONS
User’s Manual U18432EJ5V0UD
39
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