UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 665

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(1) Interrupt request flag registers (IF0L, IF0H, IF1L, IF1H, IF2L, IF2H)
INTTM05
INTTM06
INTTM07
INTP6
INTP7
INTP8
INTP9
INTP10
INTP11
INTTM10
INTTM11
INTTM12
INTTM13
The interrupt request flags are set to 1 when the corresponding interrupt request is generated or an instruction is
executed. They are cleared to 0 when an instruction is executed upon acknowledgment of an interrupt request or
upon reset signal generation.
When an interrupt is acknowledged, the interrupt request flag is automatically cleared and then the interrupt
routine is entered.
IF0L, IF0H, IF1L, IF1H, IF2L, and IF2H can be set by a 1-bit or 8-bit memory manipulation instruction. When
IF0L and IF0H, IF1L and IF1H, and IF2L and IF2H are combined to form 16-bit registers IF0, IF1, and IF2, they
can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Remark If an instruction that writes data to this register is executed, the number of instruction execution clocks
Address: FFFE0H After reset: 00H R/W
Address: FFFE1H
Interrupt
Symbol
Symbol
Source
Figure 17-2. Format of Interrupt Request Flag Registers (IF0L, IF0H, IF1L, IF1H, IF2L, IF2H) (1/2)
IF0H
IF0L
increases by 2 clocks.
SREIF0
PIF5
<7>
<7>
TMIF05
TMIF06
TMIF07
PIF6
PIF7
PIF8
PIF9
PIF10
PIF11
TMIF10
TMIF11
TMIF12
TMIF13
Table 17-2. Flags Corresponding to Interrupt Request Sources (3/3)
After reset: 00H
Interrupt Request Flag
CSIIF01
SRIF0
PIF4
<6>
<6>
CHAPTER 17 INTERRUPT FUNCTIONS
R/W
CSIIF00
STIF0
IF2L
IF2H
PIF3
Register
<5>
<5>
User’s Manual U18432EJ5V0UD
TMMK05
TMMK06
TMMK07
PMK6
PMK7
PMK8
PMK9
PMK10
PMK11
TMMK10
TMMK11
TMMK12
TMMK13
DMAIF1
PIF2
<4>
<4>
Interrupt Mask Flag
DMAIF0
PIF1
<3>
<3>
MK2L
MK2H
Register
SREIF3
PIF0
<2>
<2>
TMPR005, TMPR105
TMPR006, TMPR106
TMPR007, TMPR107
PPR06, PPR16
PPR07, PPR17
PPR08, PPR18
PPR09, PPR19
PPR010, PPR110
PPR011, PPR111
TMPR010, TMPR110
TMPR011, TMPR111
TMPR012, TMPR112
TMPR013, TMPR113
Priority Specification Flag
SRIF3
LVIIF
<1>
<1>
WDTIIF
STIF3
<0>
<0>
PR02L,
PR12L
PR02H,
PR12H
Register
663

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