UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 659

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Maskable
Interrupt
Type
Notes 1.
2.
Priority
Default
The default priority determines the sequence of interrupts if two or more maskable interrupts occur
simultaneously. Zero indicates the highest priority and 44 indicates the lowest priority.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 17-1.
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Note 1
INTTM02
INTTM03
INTAD
INTRTC
INTRTCI
INTKR
INTST2
/INTCSI20
/INTIIC20
INTSR2
/INTCSI21
/INTIIC21
INTSRE2
INTTM04
INTTM05
INTTM06
INTTM07
INTP6
INTP7
INTP8
INTP9
INTP10
INTP11
INTTM10
INTTM11
INTTM12
INTTM13
Name
End of timer array unit 0 channel 2 count or
capture
End of timer array unit 0 channel 3 count or
capture
End of A/D conversion
Fixed-cycle signal of real-time counter/alarm
match detection
Interval signal detection of real-time counter
Key return signal detection
UART2 transmission transfer end or buffer
empty interrupt/CSI20 transfer end or buffer
empty interrupt/IIC20 transfer end
UART2 reception transfer end/CSI21 transfer
end or buffer empty interrupt/IIC21 transfer
end
End of timer array unit 0 channel 4 count or
capture
End of timer array unit 0 channel 5 count or
capture
End of timer array unit 0 channel 6 count or
capture
End of timer array unit 0 channel 7 count or
capture
Pin input edge detection
End of timer array unit 1 channel 0 count or
capture
End of timer array unit 1 channel 1 count or
capture
End of timer array unit 1 channel 2 count or
capture
End of timer array unit 1 channel 3 count or
capture
UART2 reception communication error
occurrence
Table 17-1. Interrupt Source List (2/3)
CHAPTER 17 INTERRUPT FUNCTIONS
Interrupt Source
User’s Manual U18432EJ5V0UD
Trigger
Internal
External
Internal
External
Internal
Internal/
External
Address
003CH
004CH
005CH
0030H
0032H
0034H
0036H
0038H
003AH
003EH
0040H
0042H
0044H
0046H
0048H
004AH
004EH
0050H
0052H
0054H
0056H
0058H
005AH
Vector
Table
Configuration
Type
Basic
(C)
(D)
(A)
(A)
(A)
Note 2
657