UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 202

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.8 Example of Connection to Memory
5.8.1 Connection of external logic (ASIC, etc.)
buses, use CLKOUT as the reference clock. Other signals have delay on CLKOUT, however, note with caution that
the CLKOUT does not delay on-board or when designing external logic.
5.8.2 Connection of synchronous memory
200
When connecting the external logic, select the multiplexed bus mode or separate bus mode. When connecting
Use a separate bus mode for connecting a synchronous memory.
78K0R/KH3
78K0R/KH3
AD7 to AD0
D15 to D0
A19 to A1
A11 to A8
CLKOUT
CLKOUT
ASTB
WAIT
WR1
WR0
WR0
P××
RD
RD
Figure 5-10. Example of Synchronous Memory Connection
4
8
Figure 5-9. Example of External Logic Connection
CHAPTER 5 EXTERNAL BUS INTERFACE
19
16
User’s Manual U18432EJ5V0UD
EN
Wait
Read
Write
Clock
Write data bus
Read data bus
Synchronous memory
WR1 (higher byte write enable)
A18 to A0 (address)
D15 to D0 (data)
OE (output enable)
WR0 (lower byte write enable)
CLKOUT (input clock)
CE (chip enable)
Address bus