UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 82

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

80
FFF2DH
FFF2EH
FFF2FH
FFF30H
FFF31H
FFF32H
FFF34H
FFF35H
FFF37H
FFF38H
FFF39H
FFF3AH
FFF3BH
FFF3CH
FFF3EH
FFF3FH
FFF44H
FFF45H
FFF46H
FFF47H
FFF48H
FFF49H
FFF4AH
FFF4BH
FFF50H
FFF51H
FFF52H
FFF53H
FFF54H
FFF55H
FFF56H
FFF64H
FFF65H
FFF66H
FFF67H
FFF68H
FFF69H
FFF6AH
FFF6BH
FFF6CH
FFF6DH
FFF6EH
FFF6FH
Address
Port mode register 13
Port mode register 14
Port mode register 15
A/D converter mode register
Analog input channel specification register
D/A converter mode register
Port register 16
Port mode register 16
Key return mode register
External interrupt rising edge enable register 0
External interrupt falling edge enable register 0
External interrupt rising edge enable register 1
External interrupt falling edge enable register 1
Input switch control register
Timer input select register 0
Timer input select register 1
Serial data register 02
Serial data register 03
Serial data register 10
Serial data register 11
IIC shift register 0
IIC flag register 0
IIC control register 0
IIC slave address register 0
IIC clock select register 0
IIC function expansion register 0
IIC status register 0
Timer data register 02
Timer data register 03
Timer data register 04
Timer data register 05
Timer data register 06
Timer data register 07
Special Function Register (SFR) Name
CHAPTER 3 CPU ARCHITECTURE
Table 3-5. SFR List (2/5)
User’s Manual U18432EJ5V0UD
PM13
PM14
PM15
ADM
ADS
DAM
P16
PM16
KRM
EGP0
EGN0
EGP1
EGN1
ISC
TIS0
TIS1
TXD1/
SIO10
RXD1/
SIO11
TXD2/
SIO20
RXD2/
SIO21
IIC0
IICF0
IICC0
SVA0
IICCL0
IICX0
IICS0
TDR02
TDR03
TDR04
TDR05
TDR06
TDR07
−
−
−
−
Symbol
SDR02
SDR03
SDR10
SDR11
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Manipulable Bit Range
1-bit
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
√
√
−
√
√
√
−
−
−
−
−
−
8-bit
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
−
√
−
√
−
√
−
√
√
√
√
√
√
√
−
−
−
−
−
−
16-bit
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
−
−
−
−
−
−
−
√
√
√
√
√
√
After Reset
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
FEH
FFH
FFH
FFH
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H