UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 204
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UPD78F1174AGF-GAT-AX
Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1174AGF-GAT-AX.pdf
(968 pages)
Specifications of UPD78F1174AGF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.1 Functions of Clock Generator
202
The clock generator generates the clock to be supplied to the CPU and peripheral hardware.
The following three kinds of system clocks and clock oscillators are selectable.
(1) Main system clock
(2) Subsystem clock
(3) Internal low-speed oscillation clock (clock for watchdog timer)
Remarks 1. f
<1> X1 oscillator
<2> Internal high-speed oscillator
An external main system clock (f
external main system clock input can be disabled by executing the STOP instruction or setting of MSTOP.
As the main system clock, a high-speed system clock (X1 clock or external main system clock) or internal high-
speed oscillation clock can be selected by setting of MCM0 (bit 4 of the system clock control register (CKC)).
• XT1 clock oscillator
• Internal low-speed oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by setting XTSTOP (bit 6 of CSC).
This circuit oscillates a clock of f
The internal low-speed oscillation clock cannot be used as the CPU clock. The only hardware that operates
with the internal low-speed oscillation clock is the watchdog timer.
Oscillation is stopped when the watchdog timer stops.
This circuit oscillates a clock of f
Oscillation can be stopped by executing the STOP instruction or setting of MSTOP (bit 7 of the clock
operation status control register (CSC)).
This circuit oscillates a clock of f
operating with this internal high-speed oscillation clock. Oscillation can be stopped by executing the
STOP instruction or setting of HIOSTOP (bit 0 of CSC).
2. The watchdog timer stops in the following cases.
f
f
• When bit 4 (WDTON) of an option byte (000C0H) = 0
• If the HALT or STOP instruction is executed when bit 4 (WDTON) of an option byte (000C0H) = 1
f
f
X
SUB
IL
IH
EX
:
:
and bit 0 (WDSTBYON) = 0
:
:
:
X1 clock oscillation frequency
Internal high-speed oscillation clock frequency
External main system clock frequency
Subsystem clock frequency
Internal low-speed oscillation clock frequency
CHAPTER 6 CLOCK GENERATOR
EX
IL
SUB
= 240 kHz (TYP.).
= 2 to 20 MHz) can also be supplied from the EXCLK/X2/P122 pin. An
X
User’s Manual U18432EJ5V0UD
= 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
= 2 to 20 MHz by connecting a resonator to X1 and X2.
IH
= 8 MHz (TYP.). After a reset release, the CPU always starts
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