UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 146

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.2.10 Port 9
using port mode register 9 (PM9). When the P90 to P97 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 9 (PU9).
using port input mode register 9 (PIM9).
port output mode register 9 (POM9).
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Port 9 is an 8-bit I/O port with an output latch. Port 9 can be set to the input mode or output mode in 1-bit units
Input to the P95 and P96 pins can be specified through a normal input buffer or a TTL input buffer in 1-bit units
Output from the P95 to P97 pins can be specified as N-ch open-drain output (V
This port can also be used for external expansion output (address bus), serial interface data I/O, and clock I/O
Reset signal generation sets port 0 to input mode.
Figures 4-32 to 4-35 show block diagrams of port 0.
Caution
P9:
PU9:
PM9:
RD:
WR××: Write signal
WR
WR
WR
RD
PORT
To use P95/SCK11/SCL11, P96/SI11/SDA11, or P97/SO11 as a general-purpose port, note the
serial array unit 0 setting.
Settings and Pins (Channel 3 of Unit 0: CSI11, UART1 Reception, IIC11).
PU
PM
Port register 9
Pull-up resistor option register 9
Port mode register 9
Read signal
PM90 to PM93
PU90 to PU93
(P90 to P93)
Output latch
Alternate
function
PU9
PM9
P9
Figure 4-32. Block Diagram of P90 to P93
CHAPTER 4 PORT FUNCTIONS
User’s Manual U18432EJ5V0UD
For details, refer to Table 13-8 Relationship Between Register
DD
tolerance) in 1-bit units using
EV
DD0
, EV
P-ch
DD1
P90/EX32
P93/EX35
to