UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 746

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

signals for the 78K0R/KH3. For details, refer to the user’s manual for the FlashPro4.
Notes 1. This pin is not required to be connected when using PG-FP5 or FL-PR5.
Remark
25.4 Connection of Pins on Board
provided on the target system. First provide a function that selects the normal operation mode or flash memory
programming mode on the board.
the same status as immediately after reset. Therefore, if the external device does not recognize the state immediately
after reset, the pins must be handled as described below.
25.4.1 FLMD0 pin
(1) In flash memory programming mode
(2) In normal operation mode
744
FLMD0
V
GND
CLK
/RESET
SI/RxD
SO/TxD
SCK
Signal Name
DD
When using the FlashPro4 as the dedicated flash memory programmer, the FlashPro4 generates the following
To write the flash memory on-board, connectors that connect the dedicated flash memory programmer must be
When the flash memory programming mode is set, all the pins not used for programming the flash memory are in
Directly connect this pin to a flash memory programmer when data is written by the flash memory programmer.
This supplies a writing voltage of the V
The FLMD0 pin does not have to be pulled down externally because it is internally pulled down by reset. To pull
it down externally, use a resistor of 1 kΩ to 200 kΩ.
It is recommended to leave this pin open during normal operation.
The FLMD0 pin must always be kept at the V
externally because it is internally pulled down by reset. However, pulling it down must be kept selected (i.e.,
FLMDPUP = “0”, default value) by using bit 7 (FLMDPUP) of the background event control register (BECTL) (see
25.5 (1) Back ground event control register). To pull it down externally, use a resistor of 200 kΩ or smaller.
Self programming and the rewriting of flash memory with the programmer can be prohibited using hardware, by
directly connecting this pin to the V
Notes 1, 2
Note 2
2. Connect SI/RxD or SO/TxD when using QB-MINI2.
×: The pin does not have to be connected.
: Be sure to connect the pin.
Output
I/O
Output
Output
Input
Output
Output
Dedicated Flash Memory Programmer
I/O
−
Mode signal
V
Ground
Clock output
Reset signal
Receive signal
Transmit signal
Transfer clock
DD
voltage generation/power monitoring
SS
pin.
DD
CHAPTER 25 FLASH MEMORY
Table 25-2. Pin Connection
Pin Function
level to the FLMD0 pin.
User’s Manual U18432EJ5V0UD
SS
level before reset release but does not have to be pulled down
FLMD0
V
V
RESET
TOOL0
DD
SS
, EV
, EV
SS0
DD0
, EV
, EV
78K0R/KH3
Pin Name
SS1
DD1
−
−
, AV
, AV
SS
REF0
, AV
REF1
Connection
×
×