UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 292

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

290
TMRmn
Figure 7-39. Example of Set Contents of Registers During Operation as Interval Timer/Square Wave Output
TPSm
TISm
(2) When f
TOm
(a) Timer mode register mn (TMRmn)
(b) Timer clock select register m (TPSm)
(c) Timer input select register m (TISm)
(d) Timer output register m (TOm)
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
Bits 7 to 4, 3 to 0
PRSmk3 to PRSmk0
CKSmn
TISmn
TOmn
Bit n
Bit n
1/0
1/0
15
1
SUB
0000
Operation clock selection
2. f
/4 is selected as count clock
14
0: Selects CKm0 as operation clock of channel n.
1: Selects CKm1 as operation clock of channel n.
f
0
CLK
mn = 00 to 07, 10 to 13, k =0, 1
SUB
(no division) is selected as selected operation clock by TPSm register.
1: Selects subsystem clock divided by four (f
0: Outputs 0 from TOmn.
1: Outputs 1 from TOmn.
13
: Subsystem clock oscillation frequency
0
0000B: Selects f
k = 0 (bits 0 to 3) when CKm0 is selected and k = 1 (bits 4 to 7) when CKm1 is selected
CCSmn
12
1
Count clock selection
TERmn
MAS
11
1: Selects subsystem clock divided by four (f
0
CLK
CHAPTER 7 TIMER ARRAY UNIT
Slave/master selection
STSmn2
10
0: Cleared to 0 when single-operation function is selected.
(no division) as operation clock selected by CKSmn of TMRmn register.
0
User’s Manual U18432EJ5V0UD
STSmn1
9
0
Start trigger selection
STSmn0
(2/3)
000B: Selects only software start.
8
0
CISmn1
1/0
SUB
7
/4).
CISmn0
1/0
6
f
SUB
00B: Detects falling edge (counts on f
01B: Detects rising edge (counts on f
10B: Detects both edges (counts on f
11B: Setting prohibited
Operation mode of channel n
/4 edge selection
000B: Interval timer
0
5
Setting of operation when counting is started
SUB
0: Neither generates INTTMmn nor inverts
1: Generates INTTMmn and inverts timer
/4).
timer output when counting is started.
output when counting is started.
4
0
MDmn3
3
0
MDmn2
2
0
MDmn1
1
0
MDmn0
SUB
SUB/
SUB
1/0
0
/4 cycles).
/4 cycles).
2 cycles).