UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 500

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.6.1 UART transmission
stop synchronization).
Note Use this operation within a range that satisfies the conditions above and the AC characteristics in the electrical
498
Remarks 1. f
Target channel
Pins used
Interrupt
Error detection flag
Transfer data length
Transfer rate
Data phase
Parity bit
Stop bit
Data direction
UART transmission is an operation to transmit data from the 78K0R/KH3 to another device asynchronously (start-
Of two channels used for UART, the even channel is used for UART transmission.
specifications (see CHAPTER 29
CHAPTER 30 ELECTRICAL SPECIFICATIONS ((A) GRADE PRODUCTS)).
UART
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
f
MCK
CLK
: System clock frequency
: Operation clock (MCK) frequency of target channel
Channel 0 of SAU0
TxD0
INTST0
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode)
can be selected.
None
5, 7, or 8 bits
Max. f
Forward output (default: high level)
Reverse output (default: low level)
The following selectable
• No parity bit
• Appending 0 parity
• Appending even parity
• Appending odd parity
The following selectable
• Appending 1 bit
• Appending 2 bits
MSB or LSB first
MCK
UART0
/6 [bps] (SDRmn [15:9] = 2 or more), Min. f
CHAPTER 13 SERIAL ARRAY UNIT
User’s Manual U18432EJ5V0UD
ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) and
Channel 2 of SAU0
TxD1
INTST1
UART1
CLK
Channel 0 of SAU1
TxD2
INTST2
/(2 × 2
11
UART2
× 128) [bps]
Note
Channel 2 of SAU1
TxD3
INTST3
UART3