UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 286
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UPD78F1174AGF-GAT-AX
Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1174AGF-GAT-AX.pdf
(968 pages)
Specifications of UPD78F1174AGF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Company:
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
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7.6 Basic Function of Timer Array Unit
7.6.1 Overview of single-operation function and combination-operation function
operate independently, and a combination-operation function that uses two or more channels in combination.
periods) and a slave channel (timer that operates in accordance with the master channel), and several rules must be
observed when using this function.
7.6.2 Basic rules of combination-operation function
284
The timer array unit consists of several channels and has a single-operation function that allows each channel to
The single-operation function can be used for any channel, regardless of the operation mode of the other channels.
The combination-operation function is realized by combining a master channel (reference timer that mainly counts
The basic rules of using the combination-operation function are as follows.
(1) Only an even channel (channel 0, 2, 4, etc.) can be set as a master channel.
(2) Any channel, except channel 0, can be set as a slave channel.
(3) The slave channel must be lower than the master channel.
(4) Two or more slave channels can be set for one master channel.
(5) When two or more master channels are to be used, slave channels with a master channel between them may
(6) The operating clock for a slave channel in combination with a master channel must be the same as that of the
(7) A master channel can transmit INTTMmn (interrupt), start software trigger, and count clock to the lower
(8) A slave channel can use the INTTMmn (interrupt), start software trigger, and count clock of the master channel,
(9) A master channel cannot use the INTTMmn (interrupt), start software trigger, and count clock from the other
(11) During a counting operation, the TSmn bit of all channels that operate in combination or only the master
(12) To stop the channels in combination simultaneously, the TTmn bit of the channels in combination must be set
Remark
(10) To simultaneously start channels that operate in combination, the TSmn bit of the channels in combination
Example: If channel 2 of the TAU0 is set as a master channel, channel 3 or those that follow (channels 3, 4,
not be set.
Example: If channels 0 and 4 of the TAU0 are set as master channels, channels 1 to 3 can be set as the
master channel. The CKS bit (bit 15 of the TMRmn register) of the slave channel that operates in combination
with the master channel must be the same value as that of the master channel.
channels.
but it cannot transmit its own INTTMmn (interrupt), start software trigger, and count clock to the lower channel.
master channel.
must be set at the same time.
channel can be set. TSmn of only a slave channel cannot be set.
at the same time.
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
mn = 00 to 07, 10 to 13
5, etc.) can be set as a slave channel.
If channel 2 of the TAU1 is set as a master channel, channel 3 (only up to channel3 on TAU1.) can
be set as a slave channel.
slave channels of master channel 0. Channels 5 to 7 cannot be set as the slave channels of
master channel 0.
CHAPTER 7 TIMER ARRAY UNIT
User’s Manual U18432EJ5V0UD
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