UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 953

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Remark “Classification” in the above table classifies revisions as follows.
CHAPTER 16 DMA CONTROLLER (continuation)
p.650
pp.651, 652
p.652
p.653
p.654
CHAPTER 17 INTERRUPT FUNCTIONS
p.659
p.660
p.677
CHAPTER 18 KEY INTERRUPT FUNCTION
p.678
p.679
CHAPTER 27 BCD CORRECTION CIRCUIT
p.762
CHAPTER 28 INSTRUCTION SET
p.767
p.783
p.784
CHAPTER 29 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
p.787
p.789
pp.790, 792,
794
pp.791, 793
pp.802 to 806 Addition of Remark to Supply current in DC Characteristics
p.819
p.820
p.822
pp.828, 829
p.831
p.834
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Addition of Caution to Figure 16-12. Example of Setting for Holding DMA Transfer Pending by
DWAITn
Change of 16.5.7 Forced termination by software
Change of (1) Priority of DMA in 16.6 Cautions on Using DMA Controller
Change of (2) DMA response time in 16.6 Cautions on Using DMA Controller
Change of description in (4) DMA pending instruction in 16.6 Cautions on Using DMA
Controller
Change of (B) External maskable interrupt (INTPn) in Figure 17-1. Basic Configuration of
Interrupt Function
Addition of (C) External maskable interrupt (INTKR) to Figure 17-1. Basic Configuration of
Interrupt Function
Addition of instruction to 17.4.4 Interrupt request hold
Change of Table 18-2. Configuration of Key Interrupt
Addition of 18.3 (2) Port mode register 7 (PM7)
Change of 27.3 BCD Correction Circuit Operation
Change of description in 28.1.4 PREFIX instruction
Change of Clocks of BT Mnemonic in Table 28-5. Operation List (16/17)
Change of Clocks of BF Mnemonic in Table 28-5. Operation List (17/17)
Deletion of Remark in X1 Oscillator Characteristics
Deletion of Remark in XT1 Oscillator Characteristics
Change of Caution in Recommended Oscillator Constants
Addition of KYOCERA KINSEKI Co., Ltd. to Recommended Oscillator Constants
Change of (b) During communication at same potential (CSI mode) (master mode, SCKp...
internal clock output) in Serial interface: Serial array unit
Change of (c) During communication at same potential (CSI mode) (slave mode, SCKp...
external clock input) in Serial interface: Serial array unit
Addition of Note to (d) During communication at same potential (simplified I
interface: Serial array unit
Change of (f) During communication at different potential (2.5 V, 3 V) (CSI mode) (master
mode, SCKp... internal clock output) in Serial interface: Serial array unit
Change of (g) During communication at different potential (2.5 V, 3 V) (CSI mode) (slave
mode, SCKp... external clock input) in Serial interface: Serial array unit
Addition of Note to (h) During communication at different potential (2.5 V, 3 V) (simplified I
mode) in Serial interface: Serial array unit
APPENDIX C REVISION HISTORY
User’s Manual U18432EJ5V0UD
Description
2
C mode) in Serial
2
C
Classification
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(a)
(c)
(c)
(c)
(a)
(a)
(c)
(c)
(c)
(b)
(b)
(c)
(b)
(b)
(b)
(4/5)
951

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