UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 628

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
626
(2) Data
Notes 1. To cancel a master wait state, write “FFH” to IIC0 or set WREL0.
WREL0
INTIIC0
WREL0
INTIIC0
ACKD0
MSTS0
ACKD0
MSTS0
WTIM0
ACKE0
WTIM0
ACKE0
Processing by master device
Transfer lines
Processing by slave device
STD0
SPD0
TRC0
SDA0
STD0
SPD0
TRC0
SPT0
SCL0
SPT0
STT0
STT0
IIC0
IIC0
2. Write data to IIC0, not setting WREL0, in order to cancel a wait state during slave transmission.
(When 8-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (2/3)
Note 1
D0
8
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
ACK
IIC0
9
Figure 14-29. Example of Slave to Master Communication
FFH Note 1
IIC0
D7
1
CHAPTER 14 SERIAL INTERFACE IIC0
data Note 2
Receiving
D6
2
Transmitting
User’s Manual U18432EJ5V0UD
D5
3
D4
4
D3
5
D2
6
D1
7
Note 1
D0
8
ACK
IIC0
9
FFH Note 1
IIC0
D7
1
data Note 2
D6
2
D5
3

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