UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 918

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

916
Port
functions
External
bus
interface
Function
P160/TI10/TO10
to
P163/TI13/TO13
PM0 to PM9,
PM11 to PM16:
Port mode
registers
P142/SCK20/
SCL20,
P143/SI20/RxD2
/SDA20,
P144/SO20/
TxD2
P145/TI07/TO07
P140/PCLBUZ0/
INTP6,
P141/PCLBUZ1/
INTP7
Port 15
ADPC: A/D port
configuration
register
1-bit
manipulation
instruction for
port register n
(Pn)
PER1:
Peripheral
enable register 1
Number of
instruction
execution clocks
and instruction
wait clocks for
fetch access
Details of
Function
To use P142/SCK20/SCL20, P143/SI20/RxD2/SDA20, or P144/SO20/TxD2 as a
general-purpose port, note the serial array unit 1 setting. For details, refer to the
following tables.
• Table 13-9 Relationship Between Register Settings and Pins (Channel 0 of Unit 1:
• Table 13-10 Relationship Between Register Settings and Pins (Channel 1 of Unit 1:
To use P145/TI07/TO07 as a general-purpose port, set bit 7 (TO07) of timer output
register 0 (TO0) and bit 7 (TOE07) of timer output enable register 0 (TOE0) to “0”,
which is the same as their default status setting.
To use P140/PCLBUZ0/INTP6 or P141/PCLBUZ1/INTP7 as a general-purpose port,
set bit 7 of clock output select registers 0 and 1 (CKS0, CKS1) to “0”, which is the
same as their default status settings.
See 2.2.17 AV
as a digital I/O.
To use P160/TI10/TO10 to P163/TI13/TO13 as a general-purpose port, set bits 0 to 3
(TO10 to TO13) of timer output register 0 (TO0) and bits 0 to 3 (TOE10 to TOE13) of
timer output enable register 0 (TOE0) to “0”, which is the same as their default status
setting.
Be sure to set bits 1 to 4 of PM12, bits 2 to 7 of PM13, bits 6 and 7 of PM14, and bits
4 to 7 of PM16 to ‘‘1’’. And be sure to set bit 0 of PM13 to ‘‘0’’.
Set the channel used for A/D conversion to the input mode by using port mode
registers 2 and 15 (PM2, PM15).
Do not set the pin set by ADPC as digital I/O by analog input channel specification
register (ADS).
P20/ANI0 to P27/ANI7 and P150/ANI8 to P157/ANI15 are set as analog inputs in the
order of P157/ANI15, …, P150/ANI8, P27/ANI7, …, P20/ANI0 by the A/D port
configuration register (ADPC). When using P20/ANI0 to P27/ANI7 and P150/ANI8 to
P157/ANI15 as analog inputs, start designing from P157/ANI15.
When a 1-bit manipulation instruction is executed on a port that provides both input
and output functions, the output latch value of an input port that is not subject to
manipulation may be written in addition to the targeted bit.
recommended to rewrite the output latch when switching a port from input mode to
output mode.
When setting the external bus interface, be sure to set EXBEN to 1 first. If EXBEN =
0, writing to a control register of the external bus interface is ignored, and, even if the
register is read, only the default value is read (except for port mode registers 0, 1, 5,
6, 7, 8, 9 (PM0, PM1, PM5, PM6, PM7, PM8, PM9) and port registers 0, 1, 5, 6, 7, 8,
9 (P0, P1, P5, P6, P7, P8, P9)).
The flash memory and external memory are located in consecutive spaces, but start
fetching in the external memory space by using a branch instruction (CALL, BR) in
the flash memory or RAM memory.
CSI20, UART2 Transmission, IIC20)
CSI21, UART2 Reception, IIC21)
APPENDIX B LIST OF CAUTIONS
User’s Manual U18432EJ5V0UD
REF0
for the voltage to be applied to the AV
Cautions
REF0
pin when using port 15
Therefore, it is
p.157
p.157
p.157
p.161
p.162
p.164
p.171
p.171
p.171
p.179
p.185
p.189
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