UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 15

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
CHAPTER 13 SERIAL ARRAY UNIT ................................................................................................. 410
13.1 Functions of Serial Array Unit ................................................................................................ 410
13.2 Configuration of Serial Array Unit .......................................................................................... 413
13.3 Registers Controlling Serial Array Unit ................................................................................. 418
13.4 Operation stop mode ............................................................................................................... 441
13.5 Operation of 3-Wire Serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21) Communication .... 444
13.6 Operation of UART (UART0, UART1, UART2, UART3) Communication............................. 497
13.7 Operation of Simplified I
13.8 Relationship Between Register Settings and Pins ............................................................... 546
13.1.1 3-wire serial I/O (CSI00, CSI01, CSI10, CSI11, CSI20, CSI21) ....................................................410
13.1.2 UART (UART0, UART1, UART2, UART3) ....................................................................................411
13.1.3 Simplified I
13.4.1 Stopping the operation by units.....................................................................................................441
13.4.2 Stopping the operation by channels ..............................................................................................442
13.5.1 Master transmission ......................................................................................................................445
13.5.2 Master reception ...........................................................................................................................454
13.5.3 Master transmission/reception ......................................................................................................462
13.5.4 Slave transmission ........................................................................................................................470
13.5.5 Slave reception .............................................................................................................................479
13.5.6 Slave transmission/reception ........................................................................................................485
13.5.7 Calculating transfer clock frequency .............................................................................................494
13.5.8 Procedure for processing errors that occurred during 3-wire serial I/O (CSI00, CSI01, CSI10,
13.6.1 UART transmission .......................................................................................................................498
13.6.2 UART reception ............................................................................................................................508
13.6.3 LIN transmission ...........................................................................................................................515
13.6.4 LIN reception.................................................................................................................................518
13.6.5 Calculating baud rate ....................................................................................................................523
13.6.6 Procedure for processing errors that occurred during UART (UART0, UART1, UART2, UART3)
13.7.1 Address field transmission ............................................................................................................529
13.7.2 Data transmission .........................................................................................................................534
13.7.3 Data reception...............................................................................................................................537
13.7.4 Stop condition generation .............................................................................................................541
13.7.5 Calculating transfer rate ................................................................................................................542
13.7.6 Procedure for processing errors that occurred during simplified I
CSI11, CSI20, CSI21) communication ..........................................................................................496
communication ..............................................................................................................................527
communication ..............................................................................................................................545
2
C (IIC10, IIC11, IIC20, IIC21) .....................................................................................412
2
C (IIC10, IIC11, IIC20, IIC21) Communication.............................. 528
User’s Manual U18432EJ5V0UD
2
C (IIC10, IIC11, IIC20, IIC21)
13

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