UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 253

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Timer data register mn (TDRmn)
Address: FFF18H, FFF19H (TDR00), FFF1AH, FFF1BH (TDR01),
TDRmn
This is a 16-bit register from which a capture function and a compare function can be selected.
The capture or compare function can be switched by selecting an operation mode by using the MDmn3 to
MDmn0 bits of TMRmn.
The value of TDRmn can be changed at any time.
This register can be read or written in 16-bit units.
Reset signal generation clears this register to 0000H.
(i) When TDRmn is used as compare register
(ii) When TDRmn is used as capture register
Counting down is started from the value set to TDRmn. When the count value reaches 0000H, an interrupt
signal (INTTMmn) is generated. TDRmn holds its value until it is rewritten.
Caution TDRmn does not perform a capture operation even if a capture trigger is input, when it is
The count value of TCRmn is captured to TDRmn when the capture trigger is input.
A valid edge of the TImn pin can be selected as the capture trigger. This selection is made by TMRmn.
Remark
FFF64H, FFF65H (TDR02) to FFF6EH, FFF6FH (TDR07)
FFF70H, FFF71H (TDR10) to FFF76H, FFF77H (TDR13)
15
set to the compare function.
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
mn = 00 to 07, 10 to 13
14
13
Figure 7-4. Format of Timer Data Register mn (TDRmn)
FFF19H (TDR00)
12
11
CHAPTER 7 TIMER ARRAY UNIT
User’s Manual U18432EJ5V0UD
10
9
8
7
After reset: 0000H
6
5
FFF18H (TDR00)
4
R/W
3
2
1
0
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