UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 706

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.1 Functions of Power-on-Clear Circuit
704
The power-on-clear circuit (POC) has the following functions.
• Generates internal reset signal at power on.
• Compares supply voltage (V
The reset signal is released when the supply voltage (V
Caution If an internal reset signal is generated in the POC circuit, the reset control flag register (RESF)
Remark This product incorporates multiple hardware functions that generate an internal reset signal. A flag
Caution If the low-voltage detector (LVI) is set to ON by an option byte by default, the reset signal is not
when V
DD
released until the supply voltage (V
< V
is cleared to 00H.
that indicates the reset source is located in the reset control flag register (RESF) for when an internal
reset signal is generated by the watchdog timer (WDT), low-voltage detector (LVI), or illegal
instruction execution. RESF is not cleared to 00H and the flag is set to 1 when an internal reset
signal is generated by WDT, LVI or illegal instruction execution. For details of RESF, see CHAPTER
20 RESET FUNCTION.
POC
.
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
DD
) and detection voltage (V
User’s Manual U18432EJ5V0UD
DD
) exceeds 2.07 V ±0.2 V.
DD
POC
) exceeds 1.59 V ±0.09 V.
= 1.59 V ±0.09 V), generates internal reset signal