UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 70

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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3.1.6 Data memory addressing
the register or memory relevant to the execution of instructions.
78K0R/KH3, based on operability and other considerations. For areas containing data memory in particular, special
addressing methods designed for the functions of special function registers (SFR) and general-purpose registers are
available for use. Figures 3-7 to 3-11 show correspondence between data memory and addressing.
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F F F 2 0 H
F F F 1 F H
F F F 0 0 H
F F E F F H
F F E E 0 H
F F E D F H
F F E 2 0 H
F F E 1 F H
F D F 0 0 H
F D E F F H
F 1 0 0 0 H
F 0 F F F H
F 8 0 0 0 H
F 0 7 F F H
E E 0 0 0 H
E D F F F H
2 0 0 0 0 H
1 F F F F H
1 D F 0 0 H
1 D E F F H
1 1 0 0 0 H
1 0 F F F H
0 D F 0 0 H
0 D E F F H
0 1 0 0 0 H
0 0 F F F H
0 0 0 0 0 H
F F F F F H
F 0 0 0 0 H
E F F F F H
Addressing refers to the method of specifying the address of the instruction to be executed next or the address of
Several addressing modes are provided for addressing the memory relevant to the execution of instructions for the
Figure 3-7. Correspondence Between Data Memory and Addressing (
Special function register (2nd SFR)
General-purpose register
Special function register (SFR)
External expansion area
Mirrored area 51.75 KB
Mirrored area 51.75 KB
Flash memory 128 KB
32 bytes
824 KB max.
Mirror area
256 bytes
Reserved
Reserved
51.75 KB
RAM
8 KB
2 KB
CHAPTER 3 CPU ARCHITECTURE
SFR addressing
When MAA = 1
When MAA = 0
User’s Manual U18432EJ5V0UD
Register addressing
Mirror
Short direct
addressing
μ
PD78F1174, 78F1174A)
Direct addressing
Register indirect addressing
Based addressing
Based indexed addressing