UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 825

no-image

UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(3) Serial interface: Serial array unit (6/18)
Caution Select the normal input buffer and the N-ch open-drain output (V
Remarks 1. R
SCLr
SDAr
2. r: IIC number (r = 10, 11, 20, 21), g: PIM and POM number (g = 0, 9, 12, 14)
3. f
the normal output mode for SCLr by using the PIMg and POMg registers.
C
(Operation clock to be set by the CKSmn bit of the SMRmn register. m: Unit number (m = 0, 1),
n: Channel number (n = 0 to 3), mn = 02, 03, 10, 11)
MCK
Simplified I
Simplified I
b
b
[Ω]: Communication line (SDAr) pull-up resistance,
[F]: Communication line (SCLr, SDAr) load capacitance
: Serial array unit operation clock frequency
CHAPTER 29 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
2
2
C mode serial transfer timing (during communication at same potential)
C mode connection diagram (during communication at same potential)
78K0R/KH3
SDAr
SCLr
User’s Manual U18432EJ5V0UD
t
LOW
V
DD
R
b
SDA
SCL
User's device
t
HIGH
DD
tolerance) mode for SDAr and
t
HD:DAT
t
SU:DAT
Standard Products
823

Related parts for UPD78F1174AGF-GAT-AX