UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 442

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

440
Address: FFF20H
Address: FFF21H
Address: FFF24H
Address: FFF29H
Address: FFF2CH
Address: FFF2EH
(18) Port mode registers 0, 1, 4, 9, 12, 14 (PM0, PM1, PM4, PM9, PM12, PM14)
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
PM12
PM14
PM0
PM1
PM4
PM9
Figure 13-21. Format of Port Mode Registers 0, 1, 4, 9, 12, and 14 (PM0, PM1, PM4, PM9, PM12, PM14)
These registers set input/output of ports 0, 1, 4, 9, 12, and 14 in 1-bit units.
When
P12/SO00/T
P97/SO11,
P143/SI20/R
PM02 to PM04, PM10, PM12, PM13, PM43, PM45, PM95 to PM97, PM125 to PM127, and PM142 to PM144
bits to 0, and set the output latches of P02 to P04, P10, P12, P13, P43, P45, P95 to P97, P125 to P127, and
P142 to P144 to 1.
When using the P03/SI10/R
P14/R
P126/SI21/SDA21, P142/SCK20/SCL20, and P143/SI20/R
input, set the PM03, PM04, PM10, PM11, PM14, PM43, PM44, PM95, PM96, PM125, PM126, PM142, and
PM143 bits to 1. At this time, the output latches of P03, P04, P10, P11, P14, P43, P44, P95, P96, P125,
P126, P142, and P143 may be 0 or 1.
PM0, PM1, PM4, PM9, PM12, and PM14 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
X
D3/EX28,
PM127
using
PMmn
PM07
PM17
PM47
PM97
0
1
7
7
7
7
7
7
1
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
X
X
D0/EX26, P13/T
D2/SDA20, and P144/SO20/T
the
P125/SCK21/SCL21,
Output mode (output buffer on)
Input mode (output buffer off)
P43/SCK01,
PM126
PM06
PM16
PM46
PM96
P02/SO10/T
6
6
6
6
6
6
1
R/W
R/W
R/W
R/W
R/W
R/W
X
X
D3/EX27, P43/SCK01, P45/SO01, P95/SCK11/SCL11, P96/SI11/SDA11,
D1/SDA10, P04/SCK10/SCL10, P10/SCK00/EX24, P11/SI00/R
CHAPTER 13 SERIAL ARRAY UNIT
P44/SI01,
PM125
PM145
X
PM05
PM15
PM45
PM95
D1,
Pmn pin I/O mode selection (m = 0, 1, 4, 9, 12, 14; n = 0 to 7)
5
5
5
5
5
5
User’s Manual U18432EJ5V0UD
P03/SI10/R
X
P126/SI21/SDA21,
D2 pins for serial data output or serial clock output, clear the
P95/SCK11/SCL11,
PM144
PM04
PM14
PM44
PM94
4
4
4
4
4
1
4
X
D1/SDA10,
X
D2/SDA20 pins for serial data input or serial clock
PM143
PM03
PM13
PM43
PM93
3
3
3
3
3
1
3
P04/SCK10/SCL10,
P96/SI11/SDA11,
P127/SO21,
PM142
PM02
PM12
PM42
PM92
1
2
2
2
2
2
2
PM141
PM01
PM11
PM41
PM91
P142/SCK20/SCL20,
P125/SCK21/SCL21,
1
1
1
1
1
1
1
P10/SCK00/EX24,
X
D0/EX25,
PM120
PM140
PM00
PM10
PM40
PM90
0
0
0
0
0
0