UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 937

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Interrupt
functions
Key
interrupt
function
Function
IF0L, IF0H, IF1L,
IF1H, IF2L, IF2H:
Interrupt request
flag registers
MK0L, MK0H,
MK1L, MK1H,
MK2L, MK2H:
Interrupt mask
flag registers
PR00L, PR00H,
PR01L, PR01H,
PR02L, PR02H,
PR10L, PR10H,
PR11L, PR11H,
PR12L, PR12H:
Priority
specification flag
registers
EGP0, EGP1:
External
interrupt rising
edge enable
registers, EGN0,
EGN1: External
interrupt falling
edge enable
registers
Software
interrupt request
acknowledgment
BRK instruction
KRM: Key return
mode register
Details of
Function
When manipulating a flag of the interrupt request flag register, use a 1-bit memory
manipulation instruction (CLR1).
manipulation instruction such as “IF0L.0 = 0;” or “_asm(“clr1 IF0L, 0”);” because the
compiled assembler must be a 1-bit memory manipulation instruction (CLR1).
If a program is described in C language using an 8-bit memory manipulation
instruction such as “IF0L &= 0xfe;” and compiled, it becomes the assembler of three
instructions.
In this case, even if the request flag of another bit of the same interrupt request flag
register (IF0L) is set to 1 at the timing between “mov a, IF0L” and “mov IF0L, a”, the
flag is cleared to 0 at “mov IF0L, a”. Therefore, care must be exercised when using
an 8-bit memory manipulation instruction in C language.
Be sure to set bits 5 to 7 of MK2H to 1.
Be sure to set bits 5 to 7 of PR02H and PR12H to 1.
Select the port mode by clearing EGPn and EGNn to 0 because an edge may be
detected when the external interrupt function is switched to the port function.
Do not use the RETI instruction for restoring from the software interrupt.
The BRK instruction is not one of the above-listed interrupt request hold instructions.
However, the software interrupt activated by executing the BRK instruction causes
the IE flag to be cleared.
generated during execution of the BRK instruction, the interrupt request is not
acknowledged.
If any of the KRM0 to KRM7 bits used is set to 1, set bits 0 to 7 (PU70 to PU77) of
the corresponding pull-up resistor register 7 (PU7) to 1.
mov a, IF0L
and a, #0FEH
mov IF0L, a
APPENDIX B LIST OF CAUTIONS
User’s Manual U18432EJ5V0UD
Therefore, even if a maskable interrupt request is
When describing in C language, use a bit
Cautions
p.664
p.665
p.667
p.669
p.673
p.677
p.679
(23/35)
935
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