UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 269

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Address: FFF3EH
Address: FFF3FH
(8) Timer input select register m (TISm)
Symbol
Symbol
TIS0
TIS1
TISm is used to select whether a signal input to the timer input pin (TImn) or the subsystem clock divided by
four (f
TISm can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Remark
SUB
/4) is valid for each channel.
TISmn
TIS07
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
mn = 00 to 07, 10 to 13
0
1
7
7
0
After reset: 00H
After reset: 00H
Figure 7-17. Format of Timer Input Select Register m (TISm)
Input signal of timer input pin (TImn)
Subsystem clock divided by 4 (f
TIS06
6
6
0
R/W
R/W
CHAPTER 7 TIMER ARRAY UNIT
TIS05
Selection of timer input/subsystem clock used with channel n
5
5
0
User’s Manual U18432EJ5V0UD
SUB
TIS04
/4)
4
4
0
TIS03
TIS13
3
3
TIS02
TIS12
2
2
TIS01
TIS11
1
1
TIS00
TIS10
0
0
267

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