UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 369

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.2 Configuration of Clock Output/Buzzer Output Controller
10.3 Registers Controlling Clock Output/Buzzer Output Controller
The clock output/buzzer output controller includes the following hardware.
The following two registers are used to control the clock output/buzzer output controller.
• Clock output select registers 0, 1 (CKS0, CSK1)
• Port mode register 14 (PM14)
(1) Clock output select registers 0, 1 (CKS0, CKS1)
These registers set output enable/disable for clock output or for the buzzer frequency output pin
(PCLBUZ0/PCLBUZ1), and set the output clock.
Select the clock to be output from PCLBUZ0 by using CKS0.
Select the clock to be output from PCLBUZ1 by using CKS1.
CKS0 and CKS1 are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Control registers
Table 10-1. Configuration of Clock Output/Buzzer Output Controller
CHAPTER 10 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Item
Clock output select registers 0, 1 (CKS0, CKS1)
Port mode register 14 (PM14)
Port register 14 (P14)
User’s Manual U18432EJ5V0UD
Configuration
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