DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 907
DF70845AD80FPV
Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet
1.DF70844AD80FPV.pdf
(1644 pages)
Specifications of DF70845AD80FPV
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Company:
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Transmitting and Receiving Serial Data Simultaneously (Clock Synchronous Mode): Figure
16.18 shows a sample flowchart for transmitting and receiving serial data simultaneously.
Figure 16.18 Sample Flowchart for Transmitting/Receiving Serial Data
No
No
No
Start of transmission and reception
End of transmission and reception
Write transmit data to SCFTDR,
and TEND flag in SCFSR to 0
Read ORER flag in SCLSR
Read TDFE flag in SCFSR
Read RDF flag in SCFSR
SCFRDR, and clear RDF
after reading them as 1
Clear TE and RE bits
and clear TDFE flag
Read receive data in
flag in SCFSR to 0
All data received?
in SCSCR to 0
Initialization
ORER = 1?
TDFE = 1?
RDF = 1?
Yes
No
Yes
Yes
[1]
Error handling
[3]
[4]
Section 16 Serial Communication Interface with FIFO (SCIF)
Yes
[2]
Note:
[1] SCIF status check and transmit data
[2] Receive error handling:
[3] SCIF status check and receive data
[4] Serial transmission and reception
Read SCFSR and check that the
To continue serial transmission and
write:
TDFE flag and the TEND flag are set
to 1, then write transmit data to
SCFTDR, and clear the TDFE flag
and the TEND flag to 0. The transition
of the TDFE flag from 0 to 1 can also
be identified by a TXIF interrupt.
identify any error, perform the
appropriate error handling, then clear
the ORER flag to 0.
Transmission/reception cannot be
resumed while the ORER flag is set
to 1.
read:
1, then read the receive data in
SCFRDR, and clear the RDF flag to
0. The transition of the RDF flag from
0 to 1 can also be identified by an
RXIF interrupt.
continuation procedure:
reception, read 1 from the RDF flag
and the receive data in SCFRDR, and
clear the RDF flag to 0 before
receiving the last bit in the current
frame. Similarly, read 1 from the
TDFE flag to confirm that writing is
possible before transmitting the MSB
in the current frame. Then write data
to SCFTDR and clear the TDFE flag
to 0.
Read the ORER flag in SCLSR to
Read SCFSR and check that RDF =
When switching from a transmit operation
or receive operation to simultaneous
transmission and reception operations,
clear the TE and RE bits to 0, and then
set them simultaneously to 1.
Rev. 3.00 May 17, 2007 Page 849 of 1582
REJ09B0181-0300
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