DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1624

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Rev. 3.00 May 17, 2007 Page 1566 of 1582
REJ09B0181-0300
Item
23.5.2 User Program Mode
Figure 23.13 Sample Procedure of
Repeating RAM Emulation,
Erasing, and Programming
(Overview)
23.8.3 Other Notes
Section 24 Mask ROM
25.1.3 Initial Values in RAM
Page Revision (See Manual for Details)
1264 Added
1265 Amended
1281 Amended
1282 Added
1323,
1324
1326 Added
(3) Erasing Procedure in User Program Mode
The frequency division ratio of an internal clock (Iφ), a
bus clock (Bφ), and a peripheral clock (Pφ) is specified
as ×1/4 (initial value) by the frequency control register
(FRQCR).
After the programming/erasing program has been
downloaded and the SCO bit is cleared to 0, the setting
of the frequency control register (FRQCR) can be
changed to the desired value.
1. Download time of on-chip program
5. Note on programming the product having a 256-
Newly added.
The programming program that includes the
initialization routine and the erasing program that
includes the initialization routine are each 3 kbytes
or less. Accordingly, when the CPU clock frequency
is 20 MHz, the download for each program takes
approximately 10 ms at maximum.
Kbyte user MAT
If an attempt is made to program the product having
a 256-Kbyte user MAT with more than 256 Kbytes,
data programmed after the first 256 Kbytes are not
guaranteed.
Initialize erasing program
(Specify H'FFFFB000 as
Download programming
Initialize programming
download destination)
Set FTDAR to H'04
program
program
1