DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1416

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 27 List of Registers
Rev. 3.00 May 17, 2007 Page 1358 of 1582
REJ09B0181-0300
Register Name
Interrupt control register 0
IRQ control register
IRQ status register
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D
Interrupt priority register E
Interrupt priority register F
Interrupt priority register H
Interrupt priority register I
Interrupt priority register J
Interrupt priority register K
Interrupt priority register L
Interrupt priority register M
DMA source address register_0
DMA destination address register_0
DMA transfer count register_0
DMA channel control register_0
DMA source address register_1
DMA destination address register_1
DMA transfer count register_1
DMA channel control register_1
DMA source address register_2
DMA destination address register_2
DMA transfer count register_2
DMA channel control register_2
DMA source address register_3
DMA destination address register_3
DMA transfer count register_3
DMA channel control register_3
DMA operation register
Abbreviation
ICR0
IRQCR
IRQSR
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRH
IPRI
IPRJ
IPRK
IPRL
IPRM
SAR_0
DAR_0
DMATCR_0
CHCR_0
SAR_1
DAR_1
DMATCR_1
CHCR_1
SAR_2
DAR_2
DMATCR_2
CHCR_2
SAR_3
DAR_3
DMATCR_3
CHCR_3
DMAOR
No. of
Bits
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
16
Address
H'FFFFE900
H'FFFFE902
H'FFFFE904
H'FFFFE906
H'FFFFE908
H'FFFFE980
H'FFFFE982
H'FFFFE984
H'FFFFE986
H'FFFFE98A
H'FFFFE98C
H'FFFFE98E
H'FFFFE990
H'FFFFE992
H'FFFFE994
H'FFFFEB20
H'FFFFEB24
H'FFFFEB28
H'FFFFEB2C
H'FFFFEB30
H'FFFFEB34
H'FFFFEB38
H'FFFFEB3C
H'FFFFEB40
H'FFFFEB44
H'FFFFEB48
H'FFFFEB4C
H'FFFFEB50
H'FFFFEB54
H'FFFFEB58
H'FFFFEB5C
H'FFFFEB60
Module
INTC
DMAC
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Access
Size
8, 16
8, 16
8, 16
8, 16
8, 16
16
16
16
16
16
16
16
16
16
16
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
16, 32
8, 16
No. of Access
States
Pφ reference
B:2
W:2
Pφ reference
B:2
W:2
L:4
Connected Bus
Width
16 bits
16 bits