DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1620

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Rev. 3.00 May 17, 2007 Page 1562 of 1582
REJ09B0181-0300
Item
21.1.2 Port A Control Registers L1
to L4, H1 to H4 (PACRL1 to
PACRL4, PACRH1 to PACRH4)
to 21.1.10 Port E Control
Registers L1 to L4, H1, H2
(PECRL1 to PECRL4, PECRH1,
PECRH2)
21.1.3 Port B I/O Register L
(PBIORL)
21.1.8 Port D Control Registers L1
to L4, H1 to H4 (PDCRL1 to
PDCRL4, PDCRH1 to PDCRH4)
SH7083/SH7084:
SH7085/SH7086:
Port D Control Register L4
(PDCRL4)
Port D Control Register H2
(PDCRH2)
Page Revision (See Manual for Details)
1041
to
1156
1079 Deleted
1106,
1107
1116
Note added.
Note:
….PBIORL is enabled when the port B pins are
functioning as general-purpose inputs/outputs (PB9 to
PB0), and the SCK pin is functioning as inputs/outputs
of SCI. In other states, PBIORL is disabled.
Deleted
Deleted
Bit
5
4
1
0
Bit
6
5
4
2
1
0
Bit Name
PD13MD1
PD13MD0
PD12MD1
PD12MD0
Bit Name
PD21MD2
PD21MD1
PD21MD0
PD20MD2
PD20MD1
PD20MD0
*
This function is enabled only in the on-chip
ROM enabled/disabled external-extension
mode. Do not set 1 in single-chip mode.
Description
PD13 Mode
Select the function of the
PD13/D13/TIOC4BS/AUDMD pin. Fixed to
AUDMD output when using the AUD function of
the E10A.
PD12 Mode
Select the function of the
PD12/D12/TIOC4AS/AUDRST pin. Fixed to
AUDRST output when using the AUD function of
the E10A.
Description
PD21 Mode
Select the function of the
PD21/D21/IRQ5/TIC5VS/AUDMD pin. Fixed to
AUDMD output when using the AUD function of
the E10A.
PD20 Mode
Select the function of the
PD20/D20/IRQ4/TIC5WS/AUDRST pin. Fixed to
AUDRST output when using the AUD function of
the E10A.

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