DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 883

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

16.3.11 Serial Port Register (SCSPTR)
SCSPTR is a 16-bit register that controls input/output and data for the pins multiplexed to the
SCIF function. Bits 7 and 6 can control the RTS pin, bits 5 and 4 can control the CTS pin, and bits
3 and 2 can control the SCK pin. Bits 1 and 0 can be used to output data to the TXD pin, so they
control break of serial transfer. In addition to descriptions of individual bits shown below, see
section 16.6, Serial Port Register (SCSPTR) and SCIF Pins.
SCSPTR can always be read from or written to by the CPU. Note that the respective port registers
should be used to read the values on the SCIF pins. For details, refer to section 22, I/O Ports.
Initial value:
Bit
15 to 8
7
6
R/W:
Bit:
15
R
0
-
Bit Name

RTSDT
RTSIO
14
R
0
-
13
R
0
-
Initial
value
All 0
0
Undefined R/W
12
R
0
-
11
R
0
-
R/W
R
R/W
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
RTS Port Input/Output Control
Controls the RTS pin in combination with the RTSDT bit
in this register and the MCE bit in SCFCR.
RTS Port Data
Controls the RTS pin in combination with the RTSIO bit
in this register and the MCE bit in SCFCR. Select the
RTS pin function in the PFC (pin function controller)
beforehand.
MCE RTSIO RTSDT: RTS pin state
0
0
0
1
Note: ×: Don't care
Section 16 Serial Communication Interface with FIFO (SCIF)
R
9
0
-
0
1
1
×
R
8
0
-
RTSIO RTSDT CTSIO CTSDT SCKIO SCKDT SPBIO SPBDT
R/W
7
0
×:
0:
1:
×:
R/W
Rev. 3.00 May 17, 2007 Page 825 of 1582
6
-
R/W
5
0
Setting prohibited (initial state)
Low level output
High level output
Sequence output according to
modem control logic
R/W
4
-
R/W
3
0
REJ09B0181-0300
R/W
2
-
R/W
1
0
R/W
0
-