DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 311

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
21
20
19
Bit Name
SZSEL
MPXW
Initial
Value
0
0
0
R/W
R/W
R/W
R
Description
MPX-I/O Interface Bus Width Specification
Specifies the address bit to select the bus width when
the BSZ1 and BSZ0 bits in CS5BCR are set to 11. This
setting is valid only when MPX-I/O is selected for area
5.
0: Address A14 selects the bus width
1: Address A21 selects the bus width
The following shows bus width selection through the
SZSEL bit and A14 or A21.
SZSEL
0
0
1
1
MPX-I/O Interface Address Wait
This setting is valid only when MPX-I/O is selected for
area 5. This bit specifies insertion of a wait cycle into
the address cycle in MPX-I/O interface.
0: No wait
1: Inserts one wait cycle
Reserved
This bit is always read as 0. The write value should
always be 0.
A14
0
1
No effect
No effect
Rev. 3.00 May 17, 2007 Page 253 of 1582
Section 9 Bus State Controller (BSC)
A21
No effect
No effect
0
1
Bus Width
8 bits
16 bits
8 bits
16 bits
REJ09B0181-0300

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