DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 18

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

13.4 Operation ........................................................................................................................... 705
13.5 Interrupts............................................................................................................................ 710
13.6 Usage Note......................................................................................................................... 711
Section 14 Watchdog Timer (WDT) ................................................................. 713
14.1 Features.............................................................................................................................. 713
14.2 Input/Output Pin for WDT................................................................................................. 715
14.3 Register Descriptions......................................................................................................... 716
14.4 Operation ........................................................................................................................... 720
14.5 Usage Note......................................................................................................................... 722
Section 15 Serial Communication Interface (SCI)............................................ 723
15.1 Features.............................................................................................................................. 723
15.2 Input/Output Pins............................................................................................................... 725
15.3 Register Descriptions......................................................................................................... 726
Rev. 3.00 May 17, 2007 Page xviii of lviii
13.3.3 Input Level Control/Status Register 2 (ICSR2) .................................................... 689
13.3.4 Output Level Control/Status Register 2 (OCSR2) ................................................ 693
13.3.5 Input Level Control/Status Register 3 (ICSR3) .................................................... 694
13.3.6 Software Port Output Enable Register (SPOER) .................................................. 696
13.3.7 Port Output Enable Control Register 1 (POECR1)............................................... 697
13.3.8 Port Output Enable Control Register 2 (POECR2)............................................... 699
13.4.1 Input Level Detection Operation .......................................................................... 707
13.4.2 Output-Level Compare Operation ........................................................................ 708
13.4.3 Release from High-Impedance State .................................................................... 709
13.6.1 Pin State when a Power-On Reset is Issued from the Watchdog Timer ............... 711
14.3.1 Watchdog Timer Counter (WTCNT).................................................................... 716
14.3.2 Watchdog Timer Control/Status Register (WTCSR)............................................ 717
14.3.3 Notes on Register Access ..................................................................................... 719
14.4.1 Revoking Software Standbys................................................................................ 720
14.4.2 Using Watchdog Timer Mode .............................................................................. 720
14.4.3 Using Interval Timer Mode .................................................................................. 721
14.5.1 WTCNT Setting Value ......................................................................................... 722
15.3.1 Receive Shift Register (SCRSR) .......................................................................... 727
15.3.2 Receive Data Register (SCRDR) .......................................................................... 727
15.3.3 Transmit Shift Register (SCTSR) ......................................................................... 727
15.3.4 Transmit Data Register (SCTDR)......................................................................... 728
15.3.5 Serial Mode Register (SCSMR)............................................................................ 728
15.3.6 Serial Control Register (SCSCR).......................................................................... 731
15.3.7 Serial Status Register (SCSSR) ............................................................................ 734
15.3.8 Serial Port Register (SCSPTR) ............................................................................. 740