DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 135

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

4.4
The CPG has the following registers.
For details on the addresses of these registers and the states of these registers in each processing
state, see section 27, List of Registers.
Table 4.5
4.4.1
FRQCR is a 16-bit readable/writable register that specifies the frequency division ratios for the
internal clock (Iφ), bus clock (Bφ), peripheral clock (Pφ), MTU2S clock (MIφ), and MTU2 clock
(MPφ). FRQCR can be accessed only in words.
FRQCR is initialized to H'36DB only by a power-on reset (except a power-on reset due to a WDT
overflow).
Initial value:
Register Name
Frequency control register
Oscillation stop detection
control register
R/W:
Bit:
Register Descriptions
Frequency Control Register (FRQCR)
15
R
0
-
Register Configuration
R/W
14
0
IFC[2:0]
R/W
13
1
R/W
12
1
R/W
Abbrevia-
tion
FRQCR
OSCCR
11
0
BFC[2:0]
R/W
10
1
R/W
9
1
R/W
R/W
R/W
R/W
8
0
PFC[2:0]
Initial Value
H'36DB
H'00
R/W
7
1
R/W
6
1
Rev. 3.00 May 17, 2007 Page 77 of 1582
Section 4 Clock Pulse Generator (CPG)
R/W
5
0
Address
H'FFFFE800
H'FFFFE814
MIFC[2:0]
R/W
4
1
R/W
3
1
REJ09B0181-0300
R/W
2
0
Access Size
16
8
MPFC[2:0]
R/W
1
1
R/W
0
1