DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 575

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Waveform Output by Compare Match:
The MTU2 can perform 0, 1, or toggle output from the corresponding output pin using compare
match.
1. Example of Setting Procedure for Waveform Output by Compare Match
Figure 11.6 illustrates periodic counter operation.
Figure 11.7 shows an example of the setting procedure for waveform output by compare match
Figure 11.7 Example of Setting Procedure for Waveform Output by Compare Match
TGR
H'0000
CST bit
TGF
TCNT value
Select waveform output
Start count operation
<Waveform output>
Set output timing
Output selection
mode
Figure 11.6 Periodic Counter Operation
[1]
[2]
[3]
[1] Select initial value 0 output or 1 output,
[2] Set the timing for compare match
[3] Set the CST bit in TSTR to 1 to start the
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
and compare match output value 0
output, 1 output, or toggle output, by
means of TIOR. The set initial value is
output at the TIOC pin until the first
compare match occurs.
generation in TGR.
count operation.
Counter cleared by TGR
compare match
Rev. 3.00 May 17, 2007 Page 517 of 1582
Flag cleared by software or
DTC/DMAC activation
Time
REJ09B0181-0300