DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 230

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 8 Data Transfer Controller (DTC)
Rev. 3.00 May 17, 2007 Page 172 of 1582
REJ09B0181-0300
(memory mapped)
INTC
External device
[Legend]
MRA, MRB:
SAR:
DAR:
CRA, CRB:
DTCERA to DTCERE:
DTCCR:
DTCVBR:
CHCR:
Interrupt source
External
memory
CPU interrupt
clear request
request
peripheral
On-chip
memory
On-chip
module
Interrupt
request
DTC mode registers A, B
DTC source address register
DTC destination address register
DTC transfer count registers A, B
DTC enable registers A to E
DTC control register
DTC vector base register
DMA channel control register
Figure 8.1 Block Diagram of DTC
Bus state
controller
DMAC activation source clear signal
CHCR[11:8]
DTC
determination
Activation
CPU/DTC
Register
Interrupt
request
/DMAC
control
control
control
DMAC
Bus interface
DTCERA to
DTCERE
DTCVBR
DTCCR
MRA
MRB
SAR
DAR
CRA
CRB