DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 454

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 10 Direct Memory Access Controller (DMAC)
Note:
10.3.6
BSCEHR is a 16-bit readable/writable register that specifies the timing of bus release. It also sets
the function to perform transfer by the DMAC preferentially. For details, see section 9.4.8, Bus
Function Extending Register (BSCEHR).
Rev. 3.00 May 17, 2007 Page 396 of 1582
REJ09B0181-0300
Bit
0
*
Bit Name
DME
Bus Function Extending Register (BSCEHR)
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Initial
Value
0
R/W
R/W
Description
DMA Master Enable
Enables or disables DMA transfers on all channels. If the
DME bit and the DE bit in CHCR are set to 1, transfer is
enabled. In this time, all of the bits TE in CHCR, NMIF,
and AE in DMAOR must be 0. If this bit is cleared during
transfer, transfers in all channels are terminated.
0: Disables DMA transfers on all channels
1: Enables DMA transfers on all channels