DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1539

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

[Legend]
I:
O:
H:
L:
Z:
K:
Notes: 1. Output pins become high-impedance when the HIZ bit in standby control register 6
Type
I/O Port
Pin Function
Input
Output
High-level output
Low-level output
High-impedance
Input pins become high-impedance, and output pins retain their state.
2. Becomes output when the HIZCNT bit in the common control register (CMNCR) is set
3. Becomes output when the HIZMEM bit in the common control register (CMNCR) is set
4. Becomes high-impedance when the MZIZDH bit in the high-current port control register
Pin Name
PD0 to PD8,
PD10
PD9,
PD11 to PD15
PE0 to PE3
PE4,
PE6 to PE8,
PE10
PE12 to PE15
PF0 to PF7
(STBCR6) is set to 1.
to 1.
to 1.
(HCPCR) is cleared to 0.
Z
Expansion
without ROM
8 bits
Z
Z
Z
Z
Z
16 bits
Power-On
Reset State
Expansion
with ROM
Single-
chip
I/O
I/O
Manual
I/O
I/O
I/O
I
Deep
Software
Standby
Z
Z
Z
Z
Z
Z
Pin State
Power-Down State
Rev. 3.00 May 17, 2007 Page 1481 of 1582
Software
Standby
K*
Z
(MZIZDL in
HCPCR = 0)
K*
(MZIZDL in
HCPCR = 1)
K*
K*
Z
(MZIZEL in
HCPCR = 0)
K*
(MZIZEL in
HCPCR = 1)
Z
1
1
1
1
1
Sleep
I/O
I/O
I/O
I/O
I/O
I
Bus
Master-
ship
Release
I/O
I/O
I/O
I/O
I/O
I
REJ09B0181-0300
Oscillation
Stop
Detected
I/O
I/O*
I/O
I/O
I/O*
I
5
7
Appendix
POE
Function
Used
I/O
Z
Z
I/O
Z
I