DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 203

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.3.7
BAMRB is a 32-bit readable/writable register. BAMRB specifies bits masked in the break address
specified by BARB.
Initial value:
Initial value:
Bit
31 to 0 BAMB31 to
R/W:
R/W:
Bit:
Bit:
BAMB31 BAMB30 BAMB29 BAMB28 BAMB27 BAMB26 BAMB25 BAMB24 BAMB23 BAMB22 BAMB21 BAMB20 BAMB19 BAMB18 BAMB17 BAMB16
BAMB15 BAMB14 BAMB13 BAMB12 BAMB11 BAMB10 BAMB9
Bit Name
BAMB 0
R/W
R/W
Break Address Mask Register B (BAMRB)
31
15
0
0
R/W
R/W
30
14
0
0
R/W
R/W
29
13
0
0
Initial
Value
All 0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
R/W
R/W
0
0
R/W
R/W
26
10
0
0
Description
Break Address Mask B
Specifies bits masked in the break address of channel B
specified by BARB (BAB31 to BAB0).
0: Break address BABn of channel B is included in the
1: Break address BABn of channel B is masked and is
Note: n = 31 to 0
R/W
R/W
25
0
9
0
break condition
not included in the break condition
BAMB8
R/W
R/W
24
0
8
0
BAMB7
R/W
R/W
23
0
7
0
BAMB6
R/W
R/W
Rev. 3.00 May 17, 2007 Page 145 of 1582
22
0
6
0
Section 7 User Break Controller (UBC)
BAMB5
R/W
R/W
21
0
5
0
BAMB4
R/W
R/W
20
0
4
0
BAMB3
R/W
R/W
19
0
3
0
REJ09B0181-0300
BAMB2
R/W
R/W
18
0
2
0
BAMB1
R/W
R/W
17
0
1
0
BAMB0
R/W
R/W
16
0
0
0

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