DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 931

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

17.3.7
SSTDR is an 8-bit register that stores transmit data. When 8-bit data length is selected by bits
DATS1 and DATS0 in SSCRL, SSTDR0 is valid. When 16-bit data length is selected, SSTDR0
and SSTDR1 are valid. When 32-bit data length is selected, SSTDR0 to SSTDR3 are valid. Do not
access SSTDR that is not valid.
When the SSU detects that SSTRSR is empty, it transfers the transmit data written in SSTDR to
SSTRSR and starts serial transmission. If the next transmit data has already been written to
SSTDR during serial transmission, the SSU performs consecutive serial transmission.
Although SSTDR can always be read from or written to by the CPU and DTC, to achieve reliable
serial transmission, write transmit data to SSTDR after confirming that the TDRE bit in SSSR is
set to 1.
Table 17.3 Setting of DATS Bits in SSCRL and Corresponding SSTDR
Bit
7 to 0
SSTDR0
SSTDR1
SSTDR2
SSTDR3
Bit Name
SS Transmit Data Registers 0 to 3 (SSTDR0 to SSTDR3)
00
Valid
Invalid
Invalid
Invalid
Initial value:
Initial
Value
All 0
R/W:
Bit:
R/W
R/W
R/W
7
0
01
Valid
Valid
Invalid
Invalid
R/W
6
0
Description
Serial transmit data
R/W
5
0
Section 17 Synchronous Serial Communication Unit (SSU)
DATS[1:0] Setting
R/W
4
0
R/W
3
0
10
Valid
Valid
Valid
Valid
Rev. 3.00 May 17, 2007 Page 873 of 1582
R/W
2
0
R/W
1
0
R/W
0
0
11 (Invalid setting)
Invalid
Invalid
Invalid
Invalid
REJ09B0181-0300