DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 882

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.10 FIFO Data Count Register (SCFDR)
SCFDR is a 16-bit register which indicates the number of data stored in the transmit FIFO data
register (SCFTDR) and the receive FIFO data register (SCFRDR). It indicates the number of
transmit data in SCFTDR with the upper eight bits, and the number of receive data in SCFRDR
with the lower eight bits. SCFDR can always be read from by the CPU.
Initial value:
Rev. 3.00 May 17, 2007 Page 824 of 1582
REJ09B0181-0300
Bit
15 to 13
12 to 8
7 to 5
4 to 0
R/W:
Bit:
15
R
0
-
Bit Name

T[4:0]

R[4:0]
14
R
0
-
13
R
0
-
Initial
value
All 0
00000
All 0
00000
12
R
0
11
R
0
R/W
R
R
R
R
T[4:0]
10
R
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Indicate the number of non-transmitted data stored in
SCFTDR. H'00 means no transmit data, and H'10
means that SCFTDR is full of transmit data.
Reserved
These bits are always read as 0. The write value should
always be 0.
Indicate the number of receive data stored in SCFRDR.
H'00 means no receive data, and H'10 means that
SCFRDR full of receive data.
R
9
0
R
8
0
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
R
3
0
R[4:0]
R
2
0
R
1
0
R
0
0