DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 529
DF70845AD80FPV
Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet
1.DF70844AD80FPV.pdf
(1644 pages)
Specifications of DF70845AD80FPV
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Company:
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 529 of 1644
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Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Bit
0
2. If another flag setting condition occurs before writing 0 to the bit after reading it as 1, the
Bit Name
TGFA
flag will not be cleared by writing 0 to it once. In this case, read the bit as 1 again and
write 0 to it.
Initial
Value
0
R/W
R/(W)*
1
Description
Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match. Only 0 can be written, for
flag clearing.
[Setting conditions]
•
•
[Clearing conditions]
•
•
•
When TCNT = TGRA and TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal and TGRA is functioning as input
capture register
When DMAC is activated by TGIA interrupt
When DTC is activated by TGIA interrupt and the
DISEL bit of MRB in DTC is 0
When 0 is written to TGFA after reading TGFA = 1*
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 3.00 May 17, 2007 Page 471 of 1582
REJ09B0181-0300
2
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