DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1137

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

21.1.3
PBIORL is a 16-bit readable/writable register that is used to set the pins on port B as inputs or
outputs. Bits PB9IOR to PB0IOR correspond to pins PB9 to PB0 (names of multiplexed pins are
here given as port names and pin numbers alone). PBIORL is enabled when the port B pins are
functioning as general-purpose inputs/outputs (PB9 to PB0). In other states, PBIORL is disabled.
A given pin on port B will be an output pin if the corresponding bit in PBIORL is set to 1, and an
input pin if the bit is cleared to 0. However, bit 3 of PBIORL is disabled in SH7083.
Bits 15 to 10 of PBIORL are reserved. These bits are always read as 0. The write value should
always be 0.
The initial value of PBIORL is H'0000.
Initial value:
21.1.4
PBCRL1 to PBCRL3 are 16-bit readable/writable registers that are used to select the function of
the multiplexed pins on port B.
SH7083:
• Port B Control Register L3 (PBCRL3)
Initial value:
Bit
15 to 7
R/W:
R/W:
Bit:
Bit:
Port B I/O Register L (PBIORL)
Port B Control Registers L1 to L3 (PBCRL1 to PBCRL3 )
15
15
R
R
0
0
-
-
Bit Name

14
14
R
R
0
0
-
-
13
13
R
R
0
0
-
-
Initial
Value
All 0
12
12
R
R
0
0
-
-
11
11
R
R
0
0
-
-
R/W
R
10
10
R
R
0
0
-
-
R/W
PB9
IOR
R
9
0
9
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
-
R/W
PB8
IOR
R
8
0
8
0
-
R/W
PB7
IOR
R
7
0
7
0
-
Rev. 3.00 May 17, 2007 Page 1079 of 1582
R/W
R/W
MD2
PB6
PB9
IOR
6
0
6
0
Section 21 Pin Function Controller (PFC)
R/W
R/W
MD1
PB5
PB9
IOR
5
0
5
0
R/W
R/W
MD0
PB4
IOR
PB9
4
0
4
0
R/W
PB3
IOR
R
3
0
3
0
-
REJ09B0181-0300
R/W
R/W
MD2
PB2
PB8
IOR
2
0
2
0
R/W
R/W
MD1
PB1
IOR
PB8
1
0
1
0
R/W
R/W
MD0
PB0
PB8
IOR
0
0
0
0