DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1623
DF70845AD80FPV
Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet
1.DF70844AD80FPV.pdf
(1644 pages)
Specifications of DF70845AD80FPV
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Company:
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Figure 22.14 Port E (SH7086)
23.1 Features
23.4.3 Programming/Erasing
Interface Parameters
(3) Programming Execution
(3.3) Flash pass/fail result
parameter (FPFR: general register
R0 of CPU)
(4) Erasure Execution
(4.2) Flash pass/fail result
parameter (FPFR: general register
R0 of CPU)
23.5.2 User Program Mode
Page Revision (See Manual for Details)
1202 Deleted
1216 Amended
1244,
1245
1249
1258 Added
PE2 (I/O)/DREQ1 (input)/TIOC0C (I/O)/
AUDRST (input) *
PE1 (I/O)/TEND0 (output)/TIOC0B (I/O)/
AUDMD (input) *
•
Amended
Amended
(2) Programming Procedure in User Program Mode
…. Specify 1/4 (initial value) as the frequency division
ratios of an internal clock (Iφ), a bus clock (Bφ), and a
peripheral clock (Pφ) through the frequency control
register (FRQCR).
After the programming/erasing program has been
downloaded and the SCO bit is cleared to 0, the setting
of the frequency control register (FRQCR) can be
changed to the desired value.
Bit
4
Bit
4
Operating frequency for programming/erasing
The operating frequency for programming/erasing is
a maximum of 40 MHz (Pφ).
Bit Name Description
FK
Bit Name Description
FK
Flash Key Register Error Detect
Returns the check result of the value of FKEY
before the start of the programming processing.
0: FKEY setting is normal (FKEY = H'5A)
1: FKEY setting is error (FKEY = value other than
Flash Key Register Error Detect
Returns the check result of FKEY value before
start of the erasing processing.
0: FKEY setting is normal (FKEY = H'5A)
1: FKEY setting is error (FKEY = value other than
Rev. 3.00 May 17, 2007 Page 1565 of 1582
H'5A)
H'5A)
REJ09B0181-0300
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