DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 1122

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 21 Pin Function Controller (PFC)
• Port A Control Register L1 (PACRL1)
Initial value:
Rev. 3.00 May 17, 2007 Page 1064 of 1582
REJ09B0181-0300
Bit
15
14
13
12
11
10
9
8
7
R/W:
Bit:
15
R
0
-
Bit Name

PA3MD2
PA3MD1
PA3MD0

PA2MD2
PA2MD1
PA2MD0

R/W
MD2
PA3
14
0
R/W
MD1
PA3
13
0
Initial
Value
0
0
0
0
0
0
0
0
0
R/W
MD0
PA3
12
0
11
R
0
-
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R/W
MD2
PA2
10
0
R/W
MD1
PA2
9
0
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PA3 Mode
Select the function of the PA3/A24/RXD1 pin.
000: PA3 I/O (port)
001: RXD1 input (SCI)
101: A24 output (BSC)*
Other than above: Setting prohibited
Reserved
This bit is always read as 0. The write value should
always be 0.
PA2 Mode
Select the function of the
PA2/A25/DREQ0/IRQ0/SCK0 pin.
000: PA2 I/O (port)
001: SCK0 I/O (SCI)
010: DREQ0 input (DMAC)
011: IRQ0 input (INTC)
101: A25 output (BSC)*
Other than above: Setting prohibited
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
MD0
PA2
8
0
R
7
0
-
R/W
MD2
PA1
6
0
R/W
MD1
PA1
5
0
R/W
MD0
PA1
4
0
R
3
0
-
R/W
MD2
PA0
2
0
R/W
MD1
PA0
1
0
R/W
MD0
PA0
0
0