DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 896

• Manufacturer Part Number: DF70845AD80FPV
• Description: IC SUPERH MCU FLASH 112LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7080r

Specifications of DF70845AD80FPV

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: SH-2
• Speed: 80MHz
• Connectivity: EBI/EMI, FIFO, I²C, SCI, SSU
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V, 4.5V To 5.5V
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 16 Serial Communication Interface with FIFO (SCIF)
Receiving Serial Data (Asynchronous Mode):
Figures 16.7 and 16.8 show a sample flowchart for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
Rev. 3.00 May 17, 2007 Page 838 of 1582
REJ09B0181-0300
No
No
Figure 16.7 Sample Flowchart for Receiving Serial Data
ER, DR, BRK or ORER = 1?
Clear RE bit in SCSCR to 0
Read ER, DR, BRK flags in
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Read receive data in
SCFSR and ORER
flag in SCFSR to 0
All data received?
Start of reception
End of reception
flag in SCLSR
RDF = 1?
No
Yes
Yes
Error handling
[1]
[2]
[3]
Yes
[1] Receive error handling and
[2] SCIF status check and receive
[3] Serial reception continuation
break detection:
flags in SCFSR, and the
ORER flag in SCLSR, to
identify any error, perform the
appropriate error handling,
then clear the DR, ER, BRK,
and ORER flags to 0. In the
case of a framing error, a
break can also be detected by
reading the value of the RXD
pin.
data read:
RDF = 1, then read the receive
data in SCFRDR, read 1 from
the RDF flag, and then clear
the RDF flag to 0. The
transition of the RDF flag from
0 to 1 can also be identified by
an RXIF interrupt.
procedure:
read at least the receive
trigger number of receive data
bytes from SCFRDR, read 1
from the RDF flag, then clear
the RDF flag to 0. The number
of receive data bytes in
SCFRDR can be ascertained
by reading from the lower 8
bits of SCFDR.
Read the DR, ER, and BRK
Read SCFSR and check that
To continue serial reception,