DF70845AD80FPV Renesas Electronics America, DF70845AD80FPV Datasheet - Page 661

IC SUPERH MCU FLASH 112LQFP

DF70845AD80FPV

Manufacturer Part Number
DF70845AD80FPV
Description
IC SUPERH MCU FLASH 112LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7080r
Datasheet

Specifications of DF70845AD80FPV

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
SH-2
Speed
80MHz
Connectivity
EBI/EMI, FIFO, I²C, SCI, SSU
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
76
Ram Memory Size
32KB
Cpu Speed
80MHz
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V, 4.5V To 5.5V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K570865S001BE - KIT STARTER FOR SH7086R0K570865S000BE - KIT STARTER FOR SH7086HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF70845AD80FPV
Manufacturer:
TAIYO
Quantity:
40 000
Part Number:
DF70845AD80FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Example of Dead Time Compensation Setting Procedure: Figure 11.90 shows an example of
dead time compensation setting procedure by using three counters in channel 5.
MTU
ch3/4
ch5
TCNT_5 input capture occurs
Complementary PWM mode
Start count operation in
External pulse width
Figure 11.90 Example of Dead Time Compensation Setting Procedure
Interrupt processing
channels 3 to 5
Complementary
PWM output
Dead time
delay input
measurement
Figure 11.91 Example of Motor Control Circuit Configuration
[1]
[2]
[3]
[4] *
[5]
Inverter output
monitor signals
[1] Place channels 3 and 4 in complementary PWM mode. For
[2] Specify the external pulse width measurement function for
[3] Set bits CST3 and CST4 in TSTR and bits CST5U, CST5V,
[4] When the capture condition specified in TIOR is satisfied,
[5] For U-phase dead time compensation, when an interrupt is
Notes: The PFC settings must be completed in advance.
details, refer to section 11.4.8, Complementary PWM Mode.
the target TIOR in channel 5. For details, refer to section
11.4.11, External Pulse Width Measurement.
and CST5W in TSTR2 to 1 to start count operation.
the TCNT_5 value is captured in TGR_5.
generated at the crest (TGIA_3) or trough (TCIV_4) in
complementary PWM mode, read the TGRU_5 value,
calculate the difference in time in TGRB_3, and write the
corrected value to TGRD_3 in the interrupt processing.
For the V phase and W phase, read the TGRV_5 and
TGRW_5 values and write the corrected values to TGRC_4
and TGRD_4, respectively, in the same way as for U-phase
compensation.
The TCNT_5 value should be cleared through the
TCNTCMPCLR setting or by software.
* As an interrupt flag is set under the capture condition
specified in TIOR, do not enable interrupt requests in
TIER_5.
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
-
DC
U
+
U
Rev. 3.00 May 17, 2007 Page 603 of 1582
U
V
V
V
W
W
W
Motor
REJ09B0181-0300

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